Modulation schemes such as QPSK (Quadrature Phase Shift Keying) and multi-level QAM (Quadrature Amplitude Modulation) are being used in wireless communications such as mobile phones, wireless LANs (Local Area Networks) and digital television broadcasting.
These modulation schemes generate a modulated signal having a high PAPR (Peak-to-Average Power Ratio), which represents the ratio of peak power to average power. To amplify a modulated signal having a high PAPR by an amplifier, the amplifier needs to be operated in an operating region where the average output power is sufficiently lower than the saturation power of the amplifier in order to ensure high linearity of input and output characteristics of the amplifier. That is, a sufficiently large back-off from the saturation power of the amplifier needs to be ensured.
On the other hand, in the case of an amplifier that includes a field-effect transistor and the like, a large back-off decreases the average power efficiency of the amplifier because the smaller the output power, the lower is the power efficiency.
In next-generation mobile phones, wireless LANs, and digital television broadcasting, PAPR further increases because OFDM (Orthogonal Frequency Division Multiplexing) is used.
Thus the average power efficiency of an amplifier further decreases as the PAPR of a modulated signal increases. On the other hand, a Doherty-type amplifier has been devised which is an amplifier that achieves high power efficiency in an operating region with a large back-off.
FIG. 1 is a block diagram illustrating an exemplary configuration of Doherty-type amplifying device 820.
In Doherty-type amplifying device 820, an input end of amplifier 822 is connected to power divider 821 through signal line 812 and an output end of amplifier 822 is connected to ¼-wavelength transmission line 823. One end of transmission line 824 is connected to power divider 821 through signal line 813 and the other end is connected to amplifier 825. The other end of ¼-wavelength transmission line 823 is connected to amplifier 825 and resistive load 826.
Input terminal 811 accepts modulated signal 891. Power divider 821 divides power of modulated signal 891 from input terminal 811 into two. Power divider 821 divides modulated signal 891 and provides one of the resulting modulated signals to amplifier 822 through signal line 812 and provides the other onto transmission line 824 through signal line 813.
Amplifier 822 is a main amplifier biased to operate in class B. ¼-wavelength transmission lines 823 and 824 are ¼-wavelength impedance transformers having a characteristic impedance, Z0. Amplifier 825 is a peak amplifier biased to operate in class C. Resistive load 826 has a load impedance, Z0/2.
A basic operation of Doherty-type amplifying device 820 will be described below with reference to drawings.
FIG. 2 is a diagram showing the ideal power efficiency characteristic of Doherty-type amplifying device 820. FIG. 2 shows power efficiency characteristic 801 represented by a solid curve and probability density characteristic 809 represented by a dotted curve.
Power efficiency characteristic 801 represents the relationship between an amplitude normalized on the basis of the maximum amplitude of a modulated signal and the power efficiency of Doherty-type amplifying device 820. Probability density characteristic 809 is an amplitude distribution of a modulated signal in typical wireless communications and is a probability density characteristic based on a Rayleigh distribution having a peak at a back-off of 8 dB.
In power efficiency characteristic 801, when the normalized amplitude is less than or equal to “0.5”, only amplifier 822 operates in Doherty-type amplifying device 820. In this case, amplifier 822 achieves its maximum power efficiency, 78.5%, at a normalized amplitude of “0.5”. At this point, the load impedance when viewing resistive load 826 from the output end of amplifier 822 is “2Z0” due to the impedance transformation characteristics of ¼-wavelength transmission line 823.
Therefore, the output power, P1/2, of Doherty-type amplifying device 820 at a normalized amplitude of “0.5” can be expressed by the following equation.P1/2=VDD2/(4Z0)=0.5·Pmaxwhere VDD is the power supply voltage of amplifier 822 and Pmax is equal to VDD2/(2Z0).
When the normalized amplitude exceeds “0.5”, amplifier 825 starts operating along with amplifier 822. In this case, current is provided from amplifier 825 to resistive load 826 and therefore the load impedance viewed from the output end of equivalent amplifier 825 increases from “Z0/2” to “Z0” because of the load-pull effect.
Accordingly, the load impedance when viewing resistive load 826 from the output end of amplifier 822 changes from “2Z0” to “Z0” due to the impedance transformation characteristics of ¼-wavelength transmission line 823.
Accordingly, when the normalized amplitude is “1.0”, the output power of both amplifiers 822 and 825 reaches the maximum Pmax and maximum efficiency is achieved. Therefore, the output power of Doherty-type amplifying device 820 at a normalized amplitude of “1.0” is 2Pmax.
At this point, the power efficiency of entire Doherty-type amplifying device 820 is 78.5% because both amplifiers 822 and 825 operate at a saturation level. The average power efficiency weighted on the basis of probability density characteristic 809 is 64%.
Another amplifying device that achieves high power efficiency in a large back-off operating region is a class D amplifying device.
FIG. 3 is a diagram illustrating an exemplary configuration of a voltage-mode class D amplifying device. FIG. 3 illustrates class D amplifier 830 and output filter 840.
In class D amplifier 830, switching element 832 has a control terminal connected to the output end of inverter 831, one end connected to a power supply voltage VDD, and another end connected to one end of switching element 833 and an input end of output filter 840. Switching element 833 has a control terminal connected to input terminal 814 and another end grounded.
Inverter 831 inverts a pulse signal which is a modulated signal. Switching elements 832 and 833 switch between connection and disconnection. Switching elements 832 and 833 may be implemented by field-effect transistors, for example.
Output filter 840 eliminates a square-wave component of a modulated signal amplified by class D amplifier 830. Output filter 840 is made up of inductor 841 and capacitance 841 that are connected in series.
In the configuration of the class D amplifying device, input pulse signal 893 input at input terminal 814 is provided to switching element 833 and input pulse signal 893 is inverted by inverter 831 and then provided to switching element 832. Accordingly, switching elements 832 and 833 operate in opposite phases.
Specifically, when switching element 832 is in a conduction (ON) state, current flows into output filter 840 from power supply voltage VDD through switching element 832. On the other hand, when switching element 833 is in an ON state, current flows from the ground to output filter 840.
In the operations of switching elements 832 and 833 described above, no voltage appears across switching element 832 when switching element 832 is in the conduction (ON) state and current is flowing through switching element 832. On the other hand, when switching element 832 is in a non-conduction (OFF) state and a voltage appears across switching element 832, no current flows through switching element 832 itself. The same applies to the operation of switching element 833.
Accordingly, no overlap product of current and voltage occurs in switching elements 832 and 833. Therefore, class D amplifier 830 can ideally amplify an input pulse signal with a power efficiency of 100%. Original signal 894 is reproduced by eliminating a square-wave component by output filter 840.
When the class D amplifying device illustrated in FIG. 3 is used, an input signal provided to input terminal 814 of the class D amplifying device needs to be converted to a binary (1-bit) pulse train signal having two levels, on and off. To convert the input signal to a pulse train signal, information concerning phase modulation and amplitude modulation needs to be superimposed on the input signal by using a pulse modulation technique.
FIG. 4 is a diagram illustrating an exemplary configuration of transmission device 850 using a class D amplifying device. Transmission device 850 includes signal modulator 860, class D amplifier 830, output filter 840, and antenna 856. Class D amplifier 830 and output filter 840 are similar to those illustrated in FIG. 3.
Signal modulator 860 includes signal generator 861, polar coordinate converter 862, delta-sigma modulator 863, frequency converter 864, integrator 865, and frequency oscillator 869.
Signal generator 861 converts an input signal to an I (in-phase) signal and a Q (quadrature) signal represented by an I component and a Q component that are orthogonal to each other on the basis of data to be transmitted. Polar coordinate converter 862 generates an amplitude component and a phase component of the input signal on the basis of the I component and the Q component generated by conversion by signal generator 861.
Delta-sigma modulator 863 converts the amplitude component from polar coordinate converter 862 to a pulse-modulated signal, which is a 1-bit (pulse) signal. Frequency converter 864 multiplies a phase signal from polar coordinate converter 862 by a carrier signal generated by frequency oscillator 869.
Integrator 865 multiplies a phase-modulated signal from frequency converter 864 by a pulse-modulated signal from delta-sigma modulator 863. By this multiplication, integrator 865 generates modulated signal 854, which is phase-modulated signal 853 controlled to turn on and off by pulse-modulated signal 852 output from delta-sigma modulator 863.
When class D amplifier 830 accepts modulated signal 854, class D amplifier 830 amplifies modulated signal 854 with an ideal efficiency of the class D amplifier of 100% while pulse-modulated signal 852 is turned on. Class D amplifier 830 does not consume power while pulse-modulated signal 852 is turned off. Accordingly, class D amplifier 830 ideally amplifies modulated signal 854 with an efficiency of 100%.
Output filter 840 eliminates a switching component of a modulated signal amplified by class D amplifier 830 and outputs output signal 855, which is an original signal amplified with high efficiency, through antenna 856.
Non-Patent Literature 1 describes a transmission device that applies delta-sigma modulation to both I component and Q component, which is another example of a transmission device using a class D amplifier. Here, an example of the transmission device described in Non-Patent Literature 1 will be briefly described with reference to a drawing.
FIG. 5 is a block diagram illustrating an exemplary configuration of transmission device 870 that applies delta-sigma modulation to I and Q components. Transmission device 870 includes signal modulator 880, class D amplifier 830, output filter 840, and antenna 856. Class D amplifier 830, output filter 840 and antenna 856 are similar to those illustrated in FIG. 3.
Signal modulator 880 includes delta-sigma modulators 881 and 884, integrators 882 and 886, clock signal generator 883, delayer 885, and modulated signal generator 887.
An I signal and a Q signal that are orthogonal to each other are provided to input terminals 816 and 817, respectively. Delta-sigma modulators 881 and 884 apply delta-sigma modulation to signals from input terminals 816 and 817, respectively, to generate pulse signal trains 871 and 872, respectively, which are 1-bit signals.
Clock signal generator 883 generates a clock signal having a frequency four times the frequency of a carrier. Clock signal generator 883 generates a ternary clock signal that has amplitude levels “1”, “0”, “−1”, “0” that are repeated in this order. That is, clock signal generator 883 generates a clock signal that repeatedly assumes different values, a (where a is a positive number) 0, −a, 0, in this order. Clock signal generator 883 provides the generated clock signal to integrator 882 and delayer 885.
Delayer 885 delays the clock signal provided from clock signal generator 883 by one clock period.
Integrator 882 integrates pulse signal train 871 which is the 1-bit signal output from delta-sigma modulator 884 with the clock signal from clock signal generator 883.
Integrator 886 integrates pulse signal train 872 which is the 1-bit signal output from delta-sigma modulator 884 by the clock signal from delayer 885 that has been delayed by one clock period. This maintains the orthogonal relation between the I signal and the Q signal.
Modulated signal generator 887 adds signals from integrators 882 and 886 together. Thus, signal modulator 880 can generate pulse signal train 873 in which I and Q signals are superimposed on the clock signal in the order “I”, “Q”, “−I”, “−Q”, as a modulated signal.
In this way, transmission devices 850 and 870 can amplify a modulated signal in class D amplifier 830 with high power efficiency by generating a pulse signal train by using the delta-sigma modulator.
Another example of a transmission device that performs delta-sigma modulation is a transmission device that changes the height of a pulse of a pulse-modulated signal described in Patent Literature 1. The transmission device reduces generated quantization noise by performing the delta-sigma modulation.
The transmission device described in Patent Literature 1 includes an amplitude calculator, a divider, a delta-sigma modulator, a variable-gain amplifier, and an amplitude amplifier.
The amplitude calculator outputs a plurality of discrete-value signals according to the magnitude of an amplitude signal which is an amplitude component of an input signal. The divider divides the amplitude signal by the discrete-value signal and outputs the resulting amplitude signal. Delta-sigma modulator applies delta-sigma modulation to the amplitude signal.
Variable-gain amplifier amplifies an output signal from the delta-sigma modulator with a gain corresponding to the discrete-value signal. The amplitude amplifier provides the amplitude modulator with a voltage corresponding to the magnitude of the amplified output signal. The amplitude amplifier is a class D amplifier made up of a switching regulator and a switch regulator, for example.
Thus, the transmission device described in Patent Literature 1 can reduce quantization noise because the delta-sigma modulator operates near a saturation level, even when the amplitude signal is small.